161 lines
7 KiB
C
161 lines
7 KiB
C
/* Copyright (c) 2014, Cisco Systems, INC
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Written by XiangMingZhu WeiZhou MinPeng YanWang
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <xmmintrin.h>
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#include <emmintrin.h>
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#include <smmintrin.h>
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#include "main.h"
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#include "celt/x86/x86cpu.h"
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void silk_warped_LPC_analysis_filter_FIX_sse4_1(
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opus_int32 state[], /* I/O State [order + 1] */
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opus_int32 res_Q2[], /* O Residual signal [length] */
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const opus_int16 coef_Q13[], /* I Coefficients [order] */
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const opus_int16 input[], /* I Input signal [length] */
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const opus_int16 lambda_Q16, /* I Warping factor */
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const opus_int length, /* I Length of input signal */
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const opus_int order /* I Filter order (even) */
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)
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{
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opus_int n, i;
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opus_int32 acc_Q11, tmp1, tmp2;
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/* Order must be even */
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silk_assert( ( order & 1 ) == 0 );
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if (order == 10)
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{
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if (0 == lambda_Q16)
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{
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__m128i coef_Q13_3210, coef_Q13_7654;
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__m128i coef_Q13_0123, coef_Q13_4567;
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__m128i state_0123, state_4567;
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__m128i xmm_product1, xmm_product2;
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__m128i xmm_tempa, xmm_tempb;
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register opus_int32 sum;
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register opus_int32 state_8, state_9, state_a;
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register opus_int64 coef_Q13_8, coef_Q13_9;
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silk_assert( length > 0 );
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coef_Q13_3210 = OP_CVTEPI16_EPI32_M64( &coef_Q13[ 0 ] );
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coef_Q13_7654 = OP_CVTEPI16_EPI32_M64( &coef_Q13[ 4 ] );
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coef_Q13_0123 = _mm_shuffle_epi32( coef_Q13_3210, _MM_SHUFFLE( 0, 1, 2, 3 ) );
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coef_Q13_4567 = _mm_shuffle_epi32( coef_Q13_7654, _MM_SHUFFLE( 0, 1, 2, 3 ) );
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coef_Q13_8 = (opus_int64) coef_Q13[ 8 ];
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coef_Q13_9 = (opus_int64) coef_Q13[ 9 ];
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state_0123 = _mm_loadu_si128( (__m128i *)(&state[ 0 ] ) );
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state_4567 = _mm_loadu_si128( (__m128i *)(&state[ 4 ] ) );
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state_0123 = _mm_shuffle_epi32( state_0123, _MM_SHUFFLE( 0, 1, 2, 3 ) );
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state_4567 = _mm_shuffle_epi32( state_4567, _MM_SHUFFLE( 0, 1, 2, 3 ) );
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state_8 = state[ 8 ];
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state_9 = state[ 9 ];
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state_a = 0;
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for( n = 0; n < length; n++ )
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{
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xmm_product1 = _mm_mul_epi32( coef_Q13_0123, state_0123 ); /* 64-bit multiply, only 2 pairs */
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xmm_product2 = _mm_mul_epi32( coef_Q13_4567, state_4567 );
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xmm_tempa = _mm_shuffle_epi32( state_0123, _MM_SHUFFLE( 0, 1, 2, 3 ) );
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xmm_tempb = _mm_shuffle_epi32( state_4567, _MM_SHUFFLE( 0, 1, 2, 3 ) );
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xmm_product1 = _mm_srli_epi64( xmm_product1, 16 ); /* >> 16, zero extending works */
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xmm_product2 = _mm_srli_epi64( xmm_product2, 16 );
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xmm_tempa = _mm_mul_epi32( coef_Q13_3210, xmm_tempa );
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xmm_tempb = _mm_mul_epi32( coef_Q13_7654, xmm_tempb );
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xmm_tempa = _mm_srli_epi64( xmm_tempa, 16 );
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xmm_tempb = _mm_srli_epi64( xmm_tempb, 16 );
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xmm_tempa = _mm_add_epi32( xmm_tempa, xmm_product1 );
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xmm_tempb = _mm_add_epi32( xmm_tempb, xmm_product2 );
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xmm_tempa = _mm_add_epi32( xmm_tempa, xmm_tempb );
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sum = (coef_Q13_8 * state_8) >> 16;
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sum += (coef_Q13_9 * state_9) >> 16;
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xmm_tempa = _mm_add_epi32( xmm_tempa, _mm_shuffle_epi32( xmm_tempa, _MM_SHUFFLE( 0, 0, 0, 2 ) ) );
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sum += _mm_cvtsi128_si32( xmm_tempa);
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res_Q2[ n ] = silk_LSHIFT( (opus_int32)input[ n ], 2 ) - silk_RSHIFT_ROUND( ( 5 + sum ), 9);
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/* move right */
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state_a = state_9;
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state_9 = state_8;
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state_8 = _mm_cvtsi128_si32( state_4567 );
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state_4567 = _mm_alignr_epi8( state_0123, state_4567, 4 );
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state_0123 = _mm_alignr_epi8( _mm_cvtsi32_si128( silk_LSHIFT( input[ n ], 14 ) ), state_0123, 4 );
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}
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_mm_storeu_si128( (__m128i *)( &state[ 0 ] ), _mm_shuffle_epi32( state_0123, _MM_SHUFFLE( 0, 1, 2, 3 ) ) );
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_mm_storeu_si128( (__m128i *)( &state[ 4 ] ), _mm_shuffle_epi32( state_4567, _MM_SHUFFLE( 0, 1, 2, 3 ) ) );
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state[ 8 ] = state_8;
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state[ 9 ] = state_9;
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state[ 10 ] = state_a;
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return;
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}
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}
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for( n = 0; n < length; n++ ) {
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/* Output of lowpass section */
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tmp2 = silk_SMLAWB( state[ 0 ], state[ 1 ], lambda_Q16 );
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state[ 0 ] = silk_LSHIFT( input[ n ], 14 );
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/* Output of allpass section */
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tmp1 = silk_SMLAWB( state[ 1 ], state[ 2 ] - tmp2, lambda_Q16 );
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state[ 1 ] = tmp2;
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acc_Q11 = silk_RSHIFT( order, 1 );
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acc_Q11 = silk_SMLAWB( acc_Q11, tmp2, coef_Q13[ 0 ] );
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/* Loop over allpass sections */
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for( i = 2; i < order; i += 2 ) {
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/* Output of allpass section */
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tmp2 = silk_SMLAWB( state[ i ], state[ i + 1 ] - tmp1, lambda_Q16 );
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state[ i ] = tmp1;
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acc_Q11 = silk_SMLAWB( acc_Q11, tmp1, coef_Q13[ i - 1 ] );
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/* Output of allpass section */
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tmp1 = silk_SMLAWB( state[ i + 1 ], state[ i + 2 ] - tmp2, lambda_Q16 );
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state[ i + 1 ] = tmp2;
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acc_Q11 = silk_SMLAWB( acc_Q11, tmp2, coef_Q13[ i ] );
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}
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state[ order ] = tmp1;
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acc_Q11 = silk_SMLAWB( acc_Q11, tmp1, coef_Q13[ order - 1 ] );
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res_Q2[ n ] = silk_LSHIFT( (opus_int32)input[ n ], 2 ) - silk_RSHIFT_ROUND( acc_Q11, 9 );
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}
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}
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